CMOS Analog Multiplier Architectures for the Application as CNN Synapse
Electronic synapse, CNN, CMOS analog multiplier, four-quadrant multiplier, analog signal processing.
This work presents new architectures of analog multipliers in CMOS technology, for the application as synaptic elements in cellular neural networks (CNN). The proposed networks adopt two voltage-mode inputs and current-mode output, and are based on the principle according which the MOSFET acts as a gate-source voltage squarer in strong inversion and saturation. Although such principle is employed by numerous CMOS multipliers with voltage-mode inputs, the here described circuits are innovative concerning the signal application methods. One of these methods avoids the use of reference voltage generators. The circuit performance is analyzed in several aspects through simulation in 130 nm CMOS technology using symmetric power-supply of +0.6 V. In all designs a special care has been taken to reduce the area with respect to prior works of the same research group.