Banca de DEFESA: MARINEL BORGES ALMEIDA

Uma banca de DEFESA de MESTRADO foi cadastrada pelo programa.
STUDENT : MARINEL BORGES ALMEIDA
DATE: 01/02/2024
TIME: 09:00
LOCAL: Sala 24, DEEC, EPUFBA
TITLE:

Integrated BFSK Receiver for HBC based on the Injection Locking Technique

KEY WORDS:

Low consumption, CMOS, HBC, Injection locking, Receptor.

PAGES: 83
BIG AREA: Engenharias
AREA: Engenharia Elétrica
SUBÁREA: Circuitos Elétricos, Magnéticos e Eletrônicos
SPECIALTY: Circuitos Eletrônicos
SUMMARY:

The telecommunications technologies have advanced to the point of enabling networks specialized in data transmission in the vicinity of the body. This communication method, known as Body Area Network (BAN), is evolving rapidly, requiring greater portability and longer battery life. This, in turn, drives the need for reduced energy consumption. For this reason, solutions have been studied over the past three decades to improve energy eficiency in signal transmission. Among these technologies, the Human Body Communication (HBC) technique stands out in recent academic research. HBC is a wireless communication method for body networks that offers advantages in terms of consumption, security, and interference compared to other radiation-based methods. This advantage arises from using the human body as the signal transfer channel. In this work, we describe the design and post-layout simulations of a receiver for HBC with capacitive coupling, developed in 180 nm CMOS technology, capable of demodulating BFSK signals. An architecture is employed that performs frequency-phase conversion, exploiting the phenomenon of injection locking. The designed receiver incorporates an input amplifier to raise the received signal to the levels required for injection locking in a Voltage Controlled Oscillator (VCO). With injection locking, a phase difference will be present between the VCO signal and the injected signal. This phase difference is identified by a phase detector, determining whether the VCO signal is delayed or advanced. After filtering and comparing the output signals of the phase detector, the demodulation of the BFSK signal is obtained. Post-layout simulations of the circuit demonstrate the receiver's capability to operate in the range between 2 40 and 60 MHz, with data rates of up to 5 Mbps, power consumption between 0.74 mW and 1.58 mW, and communication eficiency between 148 pJ/bit and 316 pJ/bit, with power supply voltages of 1.5 V and 1.8 V, respectively.

COMMITTEE MEMBERS:
Presidente - 1554822 - EDSON PINTO SANTANA
Interno - 288125 - ROBSON NUNES DE LIMA
Interno - 3030290 - MAICON DEIVID PEREIRA
Externa à Instituição - GABRIELE COSTA GONÇALVES - UFRB